ASSIGNMENT OF MICROPROCESSOR

 

ASSIGNMENT OF MICROPROCESSOR

                           

Question No. 1 Differentiate 16-bit and 32-bit Microprocessors.

Microprocessors.

The length of commands a microprocessor can address per clock cycle is in part measured by the bit-rate and the operations per cycle. In your case, the bit rate, the literal string length of commands is addressed:
Falling back on my Bus width answer, the elemental difference between a 16-bit and 32-bit processor is pretty easy when drawn out for you. I'll use the band name "ABBA" for an example. 

16 Bit Microprocessor

Intel introduced the 16 bit microprocessor 8086 (16 bit bus) in 1978 and 8088 (8 bit bus ). In 1979 it had 29000 transistors and can address 1 mb main memory. It had 19 bit data bus width. IBM selected.
A 16-bit processor would run the string "ABBA" like this: 
Receive command 
Instruction #1 [01000001];[01000010] (This is "A" "B" in binary) 
Instruction #2 [01000010];[01000001] (This is "B" "A" in binary) 
Output 

32-bit Microprocessor

Receive command Instruction #1 [01000001];[01000010];[01000010];[01000001] ("ABBA" in Binary) 
Output A lot more goes into the actual process than this, and a 32-bit processor isn't necessarily twice as fast at the same clock speed as a 16-bit processor. In fact, real world differences are quite small, due to some under-the-hood architectural differences between 16, 32, and 64 bit processors. Just keep in mind a lower-bit processor isn't compatible with a higher-bit program, but most higher-bit processors ARE compatible with lower-bit programs.

32-bit refers to the number of bits (the smallest unit of information on a machine) that can be processed or transmitted in parallel, or the number of bits used for single element in a data format. The term when used in conjunction with a microprocessor indicates the width of the registers; a special high-speed storagearea within the CPU. A 32-bit microprocessor can process data and memory addresses that are represented by 32 bits.

Question No.2 Write short notes on:

a) Bus Interface Unit (BIU)

b) Execution Unit (EU)

Bus Interface Unit (BIU):

The BIU handles all the data and address on the buses for the execution unit (EU). It performs all bus operations such as instruction fetching, reading and writing operands for memory and calculating the addresses of the memory operands. The instruction bytes are transferred to the instruction queue. Execution unit use the instruction queue to execute the instructions. Both BIU and EU work asynchronously to execute instructions by using Pipelining mechanism which means overlapping of instruction fetch and execute mechanism.

The pipelining results in efficient use of system bus and increases system performance.

The parts of BIU are:

i. Instruction Queue

ii. Segment Registers

iii. Instruction Pointer

Execution Unit (EU)

It decodes the instructions fetched by BIU, generates control signals and executes the instruction. The main parts of Execution unit are:

i) Control system,

ii) Arithmetic and Logic Unit (ALU)

iii) Instruction decoder unit.

iv) Flag Register

v) General purpose registers and

vi) Pointers and index registers

(i) Control System: Control system performs various internal operations.

(ii) Arithmetic and logical unit: Arithmetic and logical unit performs different arithmetic operations like increment, decrement operations etc. and logical operations like AND, OR, NO T etc.

(iii) Instruction Decoder: This is used to decode the instructions that make up a program when they are being processed, and to determine in what actions must be taken in order to process them. These

decisions are normally taken by looking at the opcode of the instruction, together with the addressing mode used.

(iv) Flag Register: Flag register is a 16 bit register having 16 flip flops. Flag Register shows the condition or changes produced by the execution of an instruction and these flags get modified as and when mathematical or logical operations are performed. 8086 microprocessor uses only 9 flip-flops, so there are only nine flags in 8086 microprocessor. Figure 3.3 shows the diagram of a flag register.

Write short notes on:

a) REP Prefix

b) Table Translation

REP Prefix

Because string operations inherently involve looping, the 8086 machine language includes a prefix that considerably simplifies the use of string primitives with loops. This prefix has the machine code

                                                        1 1 1 1 10 0 1 Z

where, for the CMPS and SCAS primitives, the Z bit helps control the loop. By prefixing MOVS, LODS and STOS, which do not affect the flags, with the REP prefix 11110011, they are repeated the number of times indicated by the CX register according to the following steps:

1. If (CX) = 0, exit the REP operation.

2. Perform the specified primitive.

3. Decrement CX by 1.

4. Repeat steps 1 through 3.

For the CMPS and SCAS primitives, which do affect the flags, the prefix causes them to be repeated the number of times indicated by the CX register or until the Z-bit does not match the ZF flag, whichever occurs first.

The Z-bit/ZF flag comparison is made after each repetition. In any case the CX register is decremented with each repetition and, unless a Z-bit/ZF flag mismatch causes the termination, CX will be 0 when the loop is exited. Therefore, after repetitively executing the CMPS and SCAS primitives, the contents of ZF can be examined to determine the cause of termination.

Table Translation

It is sometimes necessary to translate from one code to another. A terminal may communicate with the computer using the EBCDIC (Extended Binary Coded Decimal Interchange Code) alphanumeric code even though the computer's software is designed to work with the ASCII (American Standard Code for Information Interchange) code, or vice versa. Code conversions involving fewer than 8 bits (which accommodates up to 256 distinct entities) can be performed most easily by storing the desired code in an array of up to 256 bytes and letting the original code be the index within the array of the desired code values. If the EBCDIC code were being converted to the ASCII code, then the EBCDIC code value for "A", which is 11000001, would be added to the address of the beginning of the array. Then, by putting the ASCII code for A, which is 01000001, in the array element having the address of the array plus 00C1, the code conversion is readily accomplished.

As an example, suppose that a string of unpacked BCD digits with zeros in the most significant 4- bits were to be converted to bit combinations to be used for lighting a seven-segment display. The arrangement of the seven segments in the display are shown in figure 5.4(a) along with the symbols for representing the segments. Figure 5.4(b) summarizes the code conversion needed to form the various digits on the display. In the figure, bit 0 of the resulting code corresponds to segment a of the display, bit 1 to segment b, and so on. It is seen that a string such as

                                                 05 07 09 00 00 01 03 04

Describe about Key-code Data Formats and FIFO Status

Word formats.

Key-code Data Formats:

After a valid Key closure, the key code is entered as a byte code into the FIFO RAM, in the following format, in scanned keyboard mode. The Key code format contains 3-bit contents of the internal row counter, 3-bit contents of the column counter and status of the SHIFT and CNTL Keys The data format of the Key code in scanned keyboard mode is shown in figure 8.26.

In the sensor matrix mode, the data from the return lines is directly entered into an appropriate row of sensor RAM that identifies the row of the sensor that changes its status. The SHIFT and CNTL Keys are ignored in this mode. RL bits represent the return lines. Rn represents the sensor RAM row number that is equal to the row number of the sensor array in which the status change was detected. Data format of the sensor code in sensor matrix mode

FIFO Status Word:

The FIFO status word is used in keyboard and strobed input mode to indicate the error. Overrun error occurs, when an already full FIFO is attempted an entry, under run error occurs when an empty FIFO read is attempted. FIFO status word also has a bit to show the unavailability of FIFO RAM because of the ongoing clearing operation.

In sensor matrix mode, a bit is reserved to show that at least one sensor closure indication is stored in the RAM. The S/E bit shows the simultaneous multiple closure error in special error mode. In sensor matrix mode, a bit is reserved to show that at least one sensor closure indication is stored in the RAM, The S/E bit shows the simultaneous multiple closure error in special error mode. The FIFO status word format is as .

Write a note on

(a) RS 232 standard

(b) IEEE 488 standard

RS 232 Standard

RS232 standard is developed by the Electronic Industry Association (EIA) in 1962 and was revised and renamed as RS232C. RS stands for "recommended standard." This is a standard hardware interface used for implementing asynchronous serial data communication ports on devices such as CRT terminals, printers, modems and keyboards. RS-232 can be plugged straight into the computer’s serial port (know as COM or Comm port). RS-232 has been around as a standard for decades as an electrical interface between Data Terminal Equipment (DTE) and Data Circuit- Terminating Equipment (DCE) such as modems. DTE stands for Data Terminal Equipment, and DCE stands for Data Communications Equipment. Your computer is a DTE device, while most other devices such as modem and other serial devices are usually DCE devices. RS-232 is the interface that your computer uses to talk to and exchange data with your modem and other serial devices. The serial ports on most computers use a subset of the RS-232C standard. The RS-232 standard defines the voltage levels that correspond to logical one and logical zero levels for the data transmission and the control signal lines.

 IEEE-488 Standard:

 IEEE-488 refers to the Institute of Electrical and Electronics Engineers (IEEE) Standard number 488. IEEE-488 was created as HP-IB (Hewlett-Packard Interface Bus), and is commonly called GPIB.

General Purpose Interface Bus

The IEEE-488, General Purpose Interface Bus (GPIB), is a general purpose digital interface system that can be used to transfer data between two or more devices. The GPIB system is a parallel communication system, which can communicate with several devices through the same interface port. The standard defines three types of devices that are connected to this bus:

Controller

Listener

Talker

All of which are connected through the IEEE-488 connector. A Talker sends data messages to one or more Listeners, which receive the data. The Controller manages the flow of information on the GPIB by sending commands to all devices. A digital voltmeter, for example, is a Talker and is also a Listener. The GPIB or IEEE 488 bus is a very flexible system and it allows the data to flow between any of the instruments on the bus, at a speed suitable for the slowest active instrument. It is possible to purchase GPIB cards to incorporate into computers that do not have the interface fitted. As GPIB cards are relatively cheap, this makes the inclusion of a GPIB card into the system a very cost effect method of installing it.

The important key features are:

• Up to 15 devices may be connected to one bus.

• Total bus length may be up to 20 m and the distance between devices may be up to 2 m

• Communication is digital (as opposed to analog) and messages are sent one byte (8 bits) at a time.

• Data rates may be up to 1 Mbyte/sec

The connector used for the IEEE 488 bus is standardized as a 24-way Amphenol 57 series type. This provides an ideal physical interface for the standard. The IEEE 488 or GPIB connector is very similar in format to those that were used for parallel printer ports on PCs. Figure 9.22 shows the IEEE-488 Connector. Data signals and control signals use opposite polarity to represent a "true" or logic 1 asserted state. RS-232C, EIA RS-232, or simply RS-232, refers to the same standard.

Write short note on:

a) Parallel Printer Interface (LPT)

b) Universal Serial Bus (USB)

Parallel Printer Interface (LPT)

The parallel printer interface (LPT) is located on the rear panel of the PC.                               The LPT stands for line printer. The Parallel Port Interface on the PC compatible computer is one of the most flexible interfaces for connecting the PC to a wide range of devices. The interface was originally intended purely for connection to printers but due to the simple nature of the digital control lines it has found many other uses. Its simplicity relies on the fact that the data to and from the port forms an 8 bit binary on/off pattern. Unlike serial ports which rely on a chip to do the data transmission, parallel data is handled entirely with software. This means that, user has complete control of the actual on/off condition of the output lines directly from his/her

program. This control is achieved by writing data to specific areas of PC I/O memory. Parallel ports have three registers: one for data out, one for output control lines and one for input control lines. The PC standard starts the I/O ports for the first parallel interface at 0x378, and for the second at 0x278. The first port is a bidirectional data register; it connects directly to pins 2

through 9 on the physical connector. The second port is a read-only status register; when the parallel port is being used for a printer, this register reports several aspects of printer status, such as being online, out of paper, or busy. The third port is an output-only control register, which, among other things, controls whether interrupts are enabled.

Universal Serial Bus (USB):-

The two main problems associated with peripherals connected to computer systems today are "plug and play" and speed of data transfer. USB (Universal Serial Bus) is designed to overcome these problems. Each USB port provides a single connector for any device that previously used parallel, serial, keyboard, and mouse or game ports. USB provides a serial bus

standard for connecting peripherals devices to PC with simplified addition and removal. USB can connect peripherals such as mice, keyboards, game pads and joysticks, scanners, digital cameras, printers, external storage, networking components, etc. The design of USB is standardized by the USB Implementers Forum (USB-IF), an industry standards body incorporating leading companies from the computer and electronics industries. The Universal Serial Bus (USB) standard was originally developed in 1995,to minimize the number of ports in the back of the PC. Universal Serial Bus (USB) is a standard used for connecting devices such as computers, set-top boxes, game consoles, Personal Digital Assistants (PDAs) and peripherals among other devices. There are various versions of USB specificationUSB1.0, USB1.1, USB2.0 and USB On-the-Go (OTG). The major goal of USB was to define an external expansion bus which makes adding peripherals to a PC at low cost and as easy as hooking up a telephone to a wall-jack. USB featured a maximum bandwidth of 1.5Mbit for low speed devices such as mice and keyboards, and a maximum bandwidth of 12Mbit for higher speed devices such as web cams, printers, scanners and external CD-RW drives. Frustrated by Apples royalty fees on firewire devices, in April 2000, seven industry-leading companies, consisting of Compaq, Hewlett Packard, Intel, Lucent, Microsoft, NEC, and Philips

published the specifications for USB2.0.

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